# Designing with the Zynq UltraScale+ RFSoC

## Course Description
This course provides an overview of the hard block capabilities for the AMD Zynq™ UltraScale+™ RFSoC family with a special emphasis on the RF Data Converter and Soft-Decision FEC blocks. The focus is on:

- Introducing the RFSoC DFE IP cores

## What's New for 2025.2
The focus is on:

- Describing the RFSoC family in general
- Identifying applications for the RF Data Converter and SD-FEC blocks
- Configuring, simulating, and implementing the blocks
- Verifying the RF Data Converter on real hardware
- Reviewing power estimation to help identify the power demands of the RFSoC device in various operating modes
- Identifying proper layout and PCB considerations since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device
- Covering Gen 1, 2, and 3 devices
- All labs have been updated to the latest software versions

## Course Details
- Level – Connectivity 3
- Price – $2,400 or 24 AMD Training Credits
- Course Part Number – CONN-RFSOC
- 5 demos
- 46 lectures
- 7 labs

## Who Should Attend?
Hardware designers interested in understanding the architecture and capabilities of the Zynq UltraScale+ RFSoC data converter and SD-FEC hard blocks.

## Prerequisites
- Basic familiarity with data converter terms and principles
- Basic familiarity with forward error correction terms and principles
- Describe the architecture and functionality of the RF-ADC and RF-DAC
- Utilize the RF-ADC and RF-DAC via configuration, simulation, and implementation
- Identify typical applications for the RF data converters
- Identify the requirements and options for data converter PCB designs

## Software Tools
- Vivado™ Design Suite 2025.2
- Vitis™ Unified IDE 2025.2

## Course Outline
- **Zynq UltraScale+ RFSoC Overview**: Overview of the Zynq UltraScale+ RFSoC architecture, including brief introductions to RF, RF data converter solutions, SD-FEC solutions, driver support, and tool support. {Lectures, Demo}
- **RF-ADC Hardware**: Provides an overview of the ZCU111 board and describes board setup. {Lectures}
- **Data Converter Design**: Describes common features, the design flow, utilizing the example design by simulation and implementation, and verifying RF data converter functionality on real hardware. Includes practice of using a software driver to modify RF data converter parameters. {Lectures, Labs}
- **Data Converter Practice**: Provides practical RF data converter experience using the ZCU111 board evaluation tool and RF analyzer tool. Demonstrates a PYNQ-based application to validate QPSK streams. Describes RF data converter frequency planning. {Lectures, Practices}
- **RF-DAC Hardware**: Covers the basics of RF-DACs. Reviews RF-DAC architecture, functionality, interfaces, configuration, and driver support. {Lectures, Demo, Lab}
- **RFSoC Hardware**: Provides an overview of the ZCU111 board and describes board setup. {Lectures}
- **PCB Design for RFSoC Devices**: Describes power requirements, performing power estimation, and utilizing the power design. Analog signal requirements, PCB materials and layer stackup options, and analog trace design are also covered. {Lectures, Demo, Lab}
- **Soft-Decision FEC Hardware**: Covers the basics of forward error correction. Reviews the SD-FEC architecture, functionality, interfaces, configuration, and driver support. {Lectures, Demo, Labs}
- **RFSoC DFE**: Utilizes DFE hard IPs.